Document Type
Patent
Publication Date
September 2006
Patent Number
7112525
Abstract
The present invention provides a method for the synthesis of nanowires in a silicon nanoporous template by electrodeposition and a novel technique for the integration of nanowires to transduction surfaces. In accordance with the present invention, a method for the fabrication of nanowire interconnects is provided. The method includes the steps of fabricating substantially vertical nanowires in a selectively passivated nanoporous silicon template, backetching the silicon template to expose the nanowires, eutectically bonding the exposed nanowires to a receiving silicon wafer, and etching the silicon template to produce substantially freestanding nanowire interconnects in contact with the receiving silicon wafer.
Application Number
10/905,243
Recommended Citation
Bhansali, Shekhar; Aravamudhan, Shyam; Luongo, Kevin; and Kedia, Sunny, "Method for the assembly of nanowire interconnects" (2006). USF Patents. 666.
https://digitalcommons.usf.edu/usf_patents/666
Assignees
University of South Florida
Filing Date
12/22/2004
Primary/U.S. Class
438/618
