Graduation Year

2020

Document Type

Dissertation

Degree

Ph.D.

Degree Name

Doctor of Philosophy (Ph.D.)

Degree Granting Department

Electrical Engineering

Major Professor

Sanjukta Bhanja, Ph.D.

Committee Member

Wilfrido A. Moreno, Ph.D.

Committee Member

Ismail Uysal, Ph.D.

Committee Member

Rasim Guldiken, Ph.D.

Committee Member

Ravi Panchumarthy, Ph.D.

Keywords

Transverse Read, Domain Wall Memory, Non-Volatile Memory, Spintronics, In-Memory Computation

Abstract

Despite the triumph of conventional computing architectures till today, there emerges a lotof computing problems that are solved poorly by them. The reason behind this are twofold: i) the computing algorithm is incompetent in solving those problems, and ii) non-ideal effects of the traditional device technologies outperform the benets of using them. Hence, extensive research eorts have been put to devise novel algorithms as well as new devices. Among them spintronic devices demonstrate better performance in traditional architectures as well as offers way better solution to a lot of new problems when bundled with unconventional computing algorithms. Apart from being used as data-storage, spintronic devices are also leveraged as computing elements in many recently proposed architectures as the underlying device physics can directly solve many problems. However, the benets of using them as computing elements become reduced or diminished because the peripherals of these architectures are based on conventional technologies. Specially the reading and programming mechanisms are not straightforward. In this dissertation, we have explored the challenges and developed the three reading techniques for a new computing framework based on spintronic devices. These nano-structured devices are prone to process variations which can significantly impair the read operation. We have addressed the process variations and modified the read techniques to combat the non-ideal eects. We have also devised a spin-orbital torque-mediated programmable magnetic grid that can solve multiple instances of a problem in same hardware. One particular spintronic device is domain wall memories. Though these memories offer high density and low power operation, they suffer from inaccurate shifting due to various faults. In this dissertation, we have discussed a novel transverse read technique to generate error correction codes to mitigate different faults. Lastly, we have modeled a new type of shifting faults, known as pinning faults, in domain wall memories due to the process variations. We have developed an analytical model of geometric variation, and characterized the fault using the critical shift current.

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