Graduation Year
2007
Document Type
Thesis
Degree
M.S.Cp.E.
Degree Granting Department
Computer Science and Engineering
Major Professor
Nagarajan Ranganathan, Ph.D.
Co-Major Professor
Co-Major Professor: Hao Zheng, Ph.D.
Committee Member
Srinivas Katkoori, Ph.D.
Keywords
Simulation, Power, Handshaking, Modeling, CPN Tools
Abstract
This thesis introduces a new methodology for energy estimation in asynchronous circuits. Unlike existing probabilistic methods, this is the first simulative work for energy estimation in all types of asynchronous circuits.
The new simulative methodology is based on Petri net modeling. A real delay model is incorporated to capture both gate delays and interconnect delays. The switching activity at each gate is captured to measure the average dynamic energy consumed per request/acknowledge handshaking pair. The new type of Petri net is called Hierarchical Colored Asynchronous Hardware Petri net (HCAHPN). The HCAHPN is able to capture the temporal and spatial correlations of signals within a circuit, while preserving gate logic behavior and timing information.
While Petri nets have been previously used for simulating combinational and sequential circuits, this is the first work that uses Petri nets for simulating asynchronous circuits. While different asynchronous design styles make various assumptions on the gate and wire delays present with the circuit, the physical implementations of these circuits always have gate and interconnect delays. Unlike previous methods, the proposed methodology is independent of the asynchronous design style used and it can be adapted for all types of asynchronous circuits that use handshaking communication.
Scholar Commons Citation
Mabry, Ryan, "Gate Level Dynamic Energy Estimation In Asynchronous Circuits Using Petri Nets" (2007). USF Tampa Graduate Theses and Dissertations.
https://digitalcommons.usf.edu/etd/3826
