Graduation Year
2004
Document Type
Thesis
Degree
M.S.E.E.
Degree Granting Department
Electrical Engineering
Major Professor
Lawrence P. Dunleavy, Ph.D.
Committee Member
Thomas Weller, Ph.D.
Committee Member
Jim Paviol, MSEE
Keywords
amplifier, load pull, triplexer, model, correlation
Abstract
This thesis focuses on the characterization and optimization of microwave power transistors using a commercial on-wafer harmonic load pull system. Specific attention is paid to the output tuning of the second harmonic impedance presented to the device. The ability to quantify the level of accuracy in a load pull system is explored by using various calibration validation methods, including a method called Delta-Gt. In this work experiments and simulation comparisons are described for three different device technologies, namely GaAs pHEMT, GaAs HJFET and InGaP HBT. Externally supplied non-linear models were used for the simulations and these were exercised and compared against 2.45 GHz fundamental frequency measurements made as part of this work to first validate the models against IV, S-Parameter and fundamental load-pull data and finally to explore performance variations under 2nd harmonic impedance tuning. The measured harmonic load-pull data pointed to different guidance on how one would match the 2nd harmonic for best performance. With regard to the model validation/assessment work it was found that only in the case of the pHEMT did the available non-linear model provide a good fit to all the different types of measurement data, including 2nd harmonic tuning data. This model was then used to show that even though the 2nd harmonic tuning measurement had a limited maximum reflection coefficient of about 0.8. Simulated results showed that the worst case linearity condition occurred for the same reflection angle as that measured, but that the variation between worst-case and best case linearity under 2nd harmonic tuning grows considerably larger as the magnitude of the 2nd harmonic reflection coefficient approaches 1. A key aspect of the methodology presented in this work is that once a non-linear model is proved to be valid for harmonic tuning conditions it can be used to explore harmonic tuning-related design trade-offs under a much wider range of frequency and tuning conditions than can be practically explored with measurements alone.
Scholar Commons Citation
Varanasi, Ravi Kumar, "Linearity Optimization of Power Transistors Utilizing Harmonic Terminations" (2004). USF Tampa Graduate Theses and Dissertations.
https://digitalcommons.usf.edu/etd/1282