Reliable Concurrent Error Detection Architectures for Extended Euclidean-Based Division Over GF(2m)

Document Type

Article

Publication Date

5-2014

Keywords

reliable and constrained embedded systems., Efficient fault diagnosis, error coverage (EC), extended Euclidean algorithm (EEA)

Digital Object Identifier (DOI)

https://doi.org/10.1109/TVLSI.2013.2260570

Abstract

The extended Euclidean algorithm (EEA) is an important scheme for performing the division operation in finite fields. Many sensitive and security-constrained applications such as those using the elliptic curve cryptography for establishing key agreement schemes, augmented encryption approaches, and digital signature algorithms utilize this operation in their structures. Although much study is performed to realize the EEA in hardware efficiently, research on its reliable implementations needs to be done to achieve fault-immune reliable structures. In this regard, this paper presents a new concurrent error detection (CED) scheme to provide reliability for the aforementioned sensitive and constrained applications. Our proposed CED architecture is a step forward toward more reliable architectures for the EEA algorithm architectures. Through simulations and based on the number of parity bits used, the error detection capability of our CED architecture is derived to be 100% for single-bit errors and close to 99% for the experimented multiple-bit errors. In addition, we present the performance degradations of the proposed approach, leading to low-cost and reliable EEA architectures. The proposed reliable architectures are also suitable for constrained and fault-sensitive embedded applications utilizing the EEA hardware implementations.

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Citation / Publisher Attribution

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v. 22, issue 5, p. 995-1003

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