Degree Granting Department
Computer Science and Engineering
Physical Design, 3D Integrated Circuits, Evolutionary Search, Placement, Sequence Pair
Dramatic improvements in circuit integration technologies have resulted in a huge increase in the complexity of circuits that can be fabricated on a single integrated circuit(IC). The significance of the performance and reliability issues of interconnects has increased greatly demanding radically different solutions such a Three-Dimensional ICs are an elegant solution to the interconnect and device density issues in the current and future technology generations as they provide an additional dimension for packing the devices. This results in a direct reduction in the chip package area and the total wiring required to complete all the interconnections. More importantly, the number and the length of long, global wires are reduced significantlydue to the availability of the third dimension for routing purposes. But to fully exploit all the advantages associated with three-dimensional ICs, a good three-dim ensional packing of devices is needed. This greatly increases the importance of Floorplanning and Placement stages ofthe VLSI Physical Design process.
There have been many initial attempts to develop a physical design framework for three-dimensional ICs but only a few of them focus on physical design for three-dimensional macro-cell based circuit designs. This work develops a novel genetic algorithm for performing both two-dimensional and three-dimensional macro-cell floorplanning. The genetic floorplanner employs two novel crossover operators. The first crossover operator (MTOX) is an unbiased stochastic search operator, while the second crossover operator (HOOX) is a heuristic operator that searches for floorplans with good area usage. Both the crossover operators can be applied transparently for both 2D and 3D floorplanning.Three mutation operators have been developed to work with the chosen floorplan representation scheme, namely Sequence Pairs. Despite the use of a comparatively s mall population size of 200, the genetic floorplanner achieves reduction in footprint area and wirelength for both 2D and 3D floorplanning as compared to some of the recent works in the literature. For 2D floorplanning, the genetic floorplanner achieves a 12 percent average reduction in total wirelength as compared to a Quadratic Programming based Floorplanner for a small 2 percent increase in area. For 3D floorplanning,the proposed floorplanner achieves a 11 percent average reduction in total wirelength and a 5 percent decrease in footprint area as compared to a Simulated Annealing based 3D floorplanner.
Scholar Commons Citation
Fernando, Pradeep R., "Genetic algorithm based two-dimensional and three-dimensional floorplanning for VLSI ASICs" (2006). Graduate Theses and Dissertations.