Graduation Year
2024
Document Type
Thesis
Degree
M.S.C.S.
Degree Name
MS in Computer Science (M.S.C.S.)
Degree Granting Department
Computer Science and Engineering
Major Professor
Hao Zheng, Ph.D.
Committee Member
Srinivas Katkoori, Ph.D.
Committee Member
Mehran Mozaffari Kermani, Ph.D.
Keywords
Machine Learning, System on Chip, Transformers
Abstract
The debugging phase is a critical time in the development of a new system on chip product. Specifically, the post-silicon validation phase is one of the most important, as it allows engineers to test the behavior of a device in a real world setting. However, the issue of noisy or incomplete data is a frequent issue when attempting to debug an SoC design during this step. This thesis examines the utility of utilizing machine learning models for the purpose of repairing missing data in a system trace. We trained various models using the transformer architecture to identify missing data in the trace. Our models were trained using several different techniques and we provided a detailed analysis of the results and utility of these techniques.
Scholar Commons Citation
Fender, Nathaniel Joseph, "Enhancing Post Silicon Visibility Using Language Modelling Techniques" (2024). USF Tampa Graduate Theses and Dissertations.
https://digitalcommons.usf.edu/etd/10616
